In general, there is formed a circuit wiring on a substrate such as a semiconductor wafer or a liquid crystal substrate for forming a semiconductor device. As a method of forming a wiring, there has been used a damascene method in which a recess such as a via or a trench for burying a wiring material such as copper is formed in the substrate and the wiring material is buried in the recess.
Further, in recent years, there has been made an attempt to reduce a mounting area of a part or a whole system by mounting multiple LSIs on a substrate using a three-dimensional mounting technology. In the three-dimensional mounting technology, a recess, e.g., a through-silicon-via (TSV), for burying a wiring material, which connects the LSIs, is formed, for example, in a substrate (e.g., a silicon substrate).
Between an inner surface of a recess in a substrate and a wiring formed in the recess, typically, there is formed a barrier film for suppressing diffusion of atoms constituting a wiring material into an insulting film (an oxide film, PI “polyimide”, etc.) on the inner surface of the recess and into the substrate on a rear surface side thereof, or for improving adhesivity therebetween. Further, between the barrier film and the wiring, typically, there is formed a seed film for making it easy to bury the wiring material.
By way of example, in Patent Document 1, there is suggested a method in which a barrier film containing ruthenium is formed on an inner surface of a recess by sputtering, a seed film containing ruthenium and copper is formed on the barrier film by sputtering, and then, copper is buried in the recess by a plating process.